? semiconductor components industries, llc, 2000 november, 2000 rev. 3 1 publication order number: mmbf170lt1/d mmbf170lt1 power mosfet 500 mamps, 60 volts nchannel sot23 maximum ratings rating symbol value unit drainsource voltage v dss 60 vdc draingate voltage v dgs 60 vdc gatesource voltage continuous nonrepetitive (t p 50 s) v gs v gsm 20 40 vdc vpk drain current continuous pulsed i d i dm 0.5 0.8 adc thermal characteristics characteristic symbol max unit total device dissipation fr5 board (note 1.) t a = 25 c derate above 25 c p d 225 1.8 mw mw/ c thermal resistance, junction to ambient r ja 556 c/w junction and storage temperature t j , t stg 55 to +150 c 1. fr5 = 1.0 0.75 0.062 in. 3 1 2 device package shipping ordering information mmbf170lt1 sot23 3000 tape & reel nchannel sot23 case 318 style 21 http://onsemi.com w marking diagram 6z w = work week pin assignment 3 2 1 drain gate 2 1 3 source mmbf170lt3 sot23 10,000 tape & reel 500 mamps 60 volts r ds(on) = 5
mmbf170lt1 http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics drainsource breakdown voltage (v gs = 0, i d = 100 a) v (br)dss 60 vdc gatebody leakage current, forward (v gsf = 15 vdc, v ds = 0) i gss 10 nadc on characteristics (note 2.) gate threshold voltage (v ds = v gs , i d = 1.0 ma) v gs(th) 0.8 3.0 vdc static drainsource onresistance (v gs = 10 vdc, i d = 200 ma) r ds(on) 5.0 onstate drain current (v ds = 25 vdc, v gs = 0) i d(off) 0.5 a dynamic characteristics input capacitance (v ds = 10 vdc, v gs = 0 v, f = 1.0 mhz) c iss 60 pf switching characteristics (note 2.) turnon delay time (v dd = 25 vdc, i d = 500 ma, r g en = 50 ) t d(on) 10 ns turnoff delay time (v dd 25 vdc , i d 500 ma , r gen 50 ) figure 1 t d(off) 10 2. pulse test: pulse width 300 s, duty cycle 2.0%. figure 1. switching test circuit figure 2. switching waveform 20 db 50 attenuator pulse generator 50 50 1 m v out 125 +25 v 40 pf v in to sampling scope 50 input pulse width 50% 90% 50% 10% 10% 90% 90% v in output inverted input (v in amplitude 10 volts) v out t off t f t d(off) t on t d(on) t r
mmbf170lt1 http://onsemi.com 3 typical electrical characteristics i d , drain current (amps) r ds(on) , static drain-source on-resistance (normalized) v gs(th) , threshold voltage (normalized) i d , drain current (amps) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 10 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 v ds , drain source voltage (volts) figure 3. ohmic region 1.0 0.8 0.6 0.4 0.2 10 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 v gs , gate source voltage (volts) figure 4. transfer characteristics 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 1.2 1.05 1.1 1.10 1.0 0.95 0.9 0.85 0.8 0.75 0.7 -60 -20 +20 +60 +100 +140 -60 -20 +20 +60 +100 +140 t, temperature ( c) figure 5. temperature versus static drainsource onresistance t, temperature ( c) figure 6. temperature versus gate threshold voltage t a = 25 c v gs = 10 v 9 v 8 v 7 v 6 v 4 v 3 v 5 v v ds = 10 v -55 c 25 c 125 c v gs = 10 v i d = 200 ma v ds = v gs i d = 1.0 ma
mmbf170lt1 http://onsemi.com 4 information for using the sot23 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. mm inches 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 sot23 power dissipation the power dissipation of the sot23 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot23 package, p d can be calculated as follows: p d = t j(max) t a r q ja the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 225 milliwatts. p d = 150 c 25 c 556 c/w = 225 milliwatts the 556 c/w for the sot23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. there are other alternatives to achieving higher power dissipation from the sot23 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
mmbf170lt1 http://onsemi.com 5 package dimensions style 21: pin 1. gate 2. source 3. drain d j k l a c b s h g v 3 1 2 dim a min max min max millimeters 0.1102 0.1197 2.80 3.04 inches b 0.0472 0.0551 1.20 1.40 c 0.0350 0.0440 0.89 1.11 d 0.0150 0.0200 0.37 0.50 g 0.0701 0.0807 1.78 2.04 h 0.0005 0.0040 0.013 0.100 j 0.0034 0.0070 0.085 0.177 k 0.0140 0.0285 0.35 0.69 l 0.0350 0.0401 0.89 1.02 s 0.0830 0.1039 2.10 2.64 v 0.0177 0.0236 0.45 0.60 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. sot23 (to236) case 31808 issue af
mmbf170lt1 http://onsemi.com 6 notes
mmbf170lt1 http://onsemi.com 7 notes
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